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Adinnieken said:
And logically you can have hUMA without eSRAM being involved.
However, regardless there are two points to be made here.
First, Microsoft designed and fabricated their own silicon. They purchased the rights to AMDs technology. AMD doesn't know what Microsoft did or didn't do.
Second, your argument doesn't stand, anymore than any other assertion. The Xbox One SoC includes coherency between the GPU and CPU. It utilizes unified memory on the DDR3 memory, and it employes an hetrogenuous system architecture. Not only that, but the Xbox One's SoC also includes coherency with the eSRAM. So whether or not it uses "hUMA" it is, AS I stated, a hetrogenuous memory architecture. As have many others in the professional community.
The argument against there being so, was largely based on the fact that some marketing guy from AMD said so. Yet the fact remains that the core Jaguar technology included it, so in the very least, the CPU and GPU would have had hUMA on the DDR3 memory, and no on the eSRAM. However, that isn't the case because Microsoft made the eSRAM coherent between the CPU and GPU.
Finally, let's drop this conversation, it isn't germain to this thread. I brought it up not because I wanted to discuss it here, but because while you stated your opinion in that thread, you along with a couple of other people (one joined in this thread) failed to actually look at what was being said and discreditted it out of hand, saying any opposition to it was wrong, despite the facts that proved otherwise.
In the end, those, including myself, who were indeed right have the satisfaction of knowing we were indeed right, and knowing that whether you truly knew you were right or wrong didn't matter, but the fact that you were closed minded enough to join in the infantile conversation and not support the logical conclusions based on factual information. Suggests that your arguments are slanted (e.g. biased).
I personally don't care whether you support the PS4, the Xbox One, or the Wii U. That isn't important to me. What is important to me is, when you have the technological knowledge whether you offer an impartial opinion or argument. Especially when it isn't something you want to do.
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Bold: That's your mistake... there is no shared coherency in eSRAM... GPU have direct access and the CPU needs to use a table cache refreshed to can acess the eSRAM... so you have portion of the memory coherent shared and portion of memory non-coherent shared... the eSRAM just kill what they call hUMA.
What mean coerency after all? Means that you will have always the latest state of the memory cache when accessed by both CPU and GPU... non-coherency is when you have to refresh the cache to get the latest updates made by CPU/GPU.
Example...
Coherent
+ GPU writes to memory and update the shared cache table
+ CPU read the shared cache table to get the latest data
Non-Coherent
+ GPU writes to memory and update it own cache table
+ CPU refresh it own cache table to get the latest updates made by GPU
+ CPU read it own cache table to get the latest data
The difference is the refresh of the cache... if you can see the latest updates in the cache... in a non-coherent shared memory you can see in the cache the latest GPU update before refresh the entrie cache... in a coherent you have always the cache shared and pointing to the latest updates.
In Xbone the DRAM memory pool have a shared coehent cache... the eSRAM not... so the what the CPU see in the DRAM pool is the samething the GPU but what CPU see in the eSRAM is ot the same than GPU see and you need to do a refresh everytime to see what the other is doing.
Now add a bit of complexity to Xbone hardware... it is not only CPU, GPU using the same memory pool... it is CPU, GPU and 4x DMEs (Data Move Engines)... so six processors wrinting/readin the memory pool in a coehent and the eSRAM in a non-coehent way.
That is the part I have to congrats MS because what they did is kind of accomplishiment and because that all the memory diagrans will have a lot of bus accesing the memory pool and the eSRAM pool... make that coehent in the memory pool (8GB DDR3) is a great feat with all these simultaneos read/write.
Now we need to see how that works.
PS. My thoughts are on hUMA can't be all accurate because there are low tech docs in the internet and it is something new (even if after all it is only a big name for techs that already exists... the way it is implemented it what I don't know for sure).