| Dark_Feanor said: ethomas: Are you a computer/hardware archtect/engineer? Or you just spend your time seaching the internet for information you have no use in your live? Sorry, this could be sounded ofencive, but I have a Bachelor Degree in Computer Engineering at Univesidade de São Paulo, São Carlos. I have friends doing their masters abroad. I HAVE some usefull knolage, some pratical (hell, I even programed in VHDL the SNES MIP processor) and a few works on FPGAs. So, what I can undestand by MS Key Note? Very few. The complexity is overwhelming. It is state of the art SOC archtecture, they haven´t disclosure 10% of the inner works. And they won´t, NEVER. And we don´t need to know. If you are not a high profile S/H engineer, if you are not working in any major foundry or IP design no discussion here can lead to anywhere near the undertanding of the XONE SOC or the PS4 architecture. Sorry. |
Cool.
Firstly "chupa CAASO" j/k
My friend graduated at UFSCar and right now is doing doctorate there... I did FATEC in Americana but like I have a lot of friends at USP-SC and UFSCar I was always partying there (TUSCA, CORSO, INTERBIO, etc)... great times.
So no... I did't have graduation in hardware engineering just software engineering but I already wrote a lot of articles for the dead tech site called ForumPCs dissecting processors archtectures (mostly CPU and GPU at time... I received a lot of docs and product sample from AMD, nVidia, Intel and at that time ATI)... so I kind of get specialized in GPU and CPU architectures.
The AMD CPU arch and nVidia/ATI (today AMD) GPUs didn't had heavly changes since K8 / R600... the basis in still there... and what MS + AMD did Xbone SoC is not hard to undestand because there is nothing really new (PS4 SoC didn't have anything new too)... how they put different techs in the same sillicon and made this work is impressive.
We are talking here about CPU/GPU clocks, bus, northbridge, eDRAM/eSRAM, DMEs, memory pool, etc... nothing is really new.
To put everything to work in harmony in one sillicon is a feat.
There are a way that AMD CPU/CPU (APU) works and MS didn't changed that... what they did is added bus, DMEs and a cached eSRAM... so the CPU clock is not synced with NB clock... in fact the NB clock have more relation with memory clock than the CPU clock (but that's now a rule too... to be fair these clock are independent each other in actual AMD processors).
The concept of coherent shared memory is not that hard to undestand... everything lies in how the cache table is refreshed... if you have separeted cache table that needs to be refreshed to share data between CPU and GPU then it is non-coherent... if you have one shared cache table that didn't need to be refreshed to share data bettwen CPU and GPU then it is coherent.
UMA is when you have a shared pool of memory... hUMA is when all the memory shared pool is coherent... NUMA is when it is non-coherent.
MS diagrans says the main memory pools is UMA and it is coherent between CPU and GPU... the eSRAM is UMA but not coherent... added that the DMEs that I don't know it it is coherent or not but they have shared access for both eSRAM and main memory pool.
That's what I undertand over AMD Arch and what MS released.
