Pemalite said:
megafenix said:
now contradicting yourself ha?
use logic dude
wii u gpu and edram same die
xbox 360 rops and edra same die
if the wii u gpu and the edra were on separate dies, then yes, there should be an external bus, but since they are in the sae die, no, the gpu has full access to the edram bandwidth
thats all you need
options
1024 bits, 4096 bits, 8192 bits for 32 egabytes
renesas says the best technology
shinen says lots of bandwidth thats even scary
1024 bits doesnt fit since doesnt give much bandwidth, its only double of the 512 bits of gamecube, and its not even o the xbox 360 4096 bits edram
minium believeable is 4096 bits to make ports even possible, the logical choice is 8192 bits which gives you 563GB/s with the forula with have passed here ad neoga and byond3d forums
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Eh. No point dragging this out farther, it's clear your opinion isn't going to change nor would you admit you're wrong anyway.
The Xbox 360's eDRAM wasn't always on the same die, it was on the same package, not die. Later as a cost reduction measure, Microsoft moved the eDRAM on-die.
Won't be replying after this, I have other things to do.
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yep, no pint at all, its clear that even if you have the evidence on your face and deny it, then your intentions are not to uncover the truth
yep, the 360 gpu and edram where on the saje package, not die
but
the xbox rops where on the same die with the edram
here, check it yourself
http://meseec.ce.rit.edu/551-projects/spring2012/2-4.pdf
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Supportfor a superset ofDirectX 9.0c APIDirectX Xbox 360, and Shader Model 3.0+
• 500 MHz, 10 MiB daughter embeddedDRAM (at 256GB/s)framebuffer on 90 nm, 80 nm(since 2008) or 65nm(since 2010).
– NEC designed eDRAM die includes additional logic (192 parallel pixel processors)for color, alpha compositing, Z/stencil buffering, and anti‐aliasing called
“Intelligent Memory”, giving developers 4‐sample anti‐aliasing at very little performance cost.
– 105million transistors
– 8 RenderOutput units
"
You do know whats a Render Output Unit I suppose right?
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The one key area of bandwidth, that has caused a fair quantity of controversy in its inclusion of specifications, is that of bandwidth available from the ROPS to the eDRAM, which stands at 256GB/s. The eDRAM is always going to be the primary location for any of the bandwidth intensive frame buffer operations and so it is specifically designed to remove the frame buffer memory bandwidth bottleneck - additionally, Z and colour access patterns tend not to be particularly optimal for traditional DRAM controllers where they are frequent read/write penalties, so by placing all of these operations in the eDRAM daughter die, aside from the system calls, this leaves the system memory bus free for texture and vertex data fetches which are both read only and are therefore highly efficient. Of course, with 10MB of frame buffer space available this isn't sufficient to fit the entire frame buffer in with 4x FSAA enabled at High Definition resolutions and we'll cover how this is handled later in the article.
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so, the same applies for wii u gpu and edram since are in the same die, just like xbox rops and the edram where in the same die
read the article dude