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Forums - Nintendo Discussion - Wiiu RAM 43% slower than PS360 RAM

Heavenly_King said:

Seems right lol, I wonder how the PS4 and 720 will be against cell XD



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ethomaz said:

Heavenly_King said:

Seems right lol, I wonder how the PS4 and 720 will be against cell XD

Vegitto pic

yeah I editted my post before reading yours.  I guess they would be different and yet capable of almost the same things.

PS4//720

Gogeta Vegitto

both rape cell

And for the PC fans reading this  I guess PC would be like this:

Goku SSJ4



joeorc said:

. MCM's are SOC's
omg, i know the difference, what do you call a SOC? just because both cores are not direct to each other on say a cpu/gpu set mem package does not mean they are not on the same chip carrier were splitting hairs here in the definition. SOC's are on the same die. which is if you went through the entire break down under the chip spreader it is both chips are on the same die. Now if you want to talk about the connection between both chips that is where were on the same page as far as the speed, but like others have pointed out we have yet to see the lay out of the  connection.s between the chips or its channel of on die connection.

Obviously you don't have the slightest clue of what you are talking about. You bring up buzzwords like "SoC", "Set mem package" (whatever THAT means), "same page" (whatever THAT means), "channel of on die connection" (huh?).

Look, the names have a VERY defined meaning. Here is what the WiiU memory system looks like EXACTLY:

1. Four 256MBit *16bit gDDR3 chips, connected to the large MCM. This gives a 64bit wide data bus (exactly what every single memory controller uses in the industry)

2.  The MCM contains two chip carriers, a large one and a small one. The small one contains the die of the CPU. A chip carrier is a square ceramic/thermoplast thingie with pins or balls on the underside that connect to a pcb and has "stuff" inside do do "stuff" (I have worked with chip carriers that contained almost a dozen analog/digital circuits).

3. We don't know what is exactly hidden inside the large chip carrier. It contains either a single die (with GPU and eDram), or two dies (one GPU, one eDram). Unless someone pries open the large chip carrier (a specialist can probably do that without killing the WiiU), we don't know.  One or two dies, one contains the dram memory controller for the gDDR3 drams (on the picture, you can see the address and data lines going to the large chip carrier). Obviously inside the GPU die, there is a lot of "magic" that handles the further distribution of memory to eDram/CPU/DSP. It is this magic that makes the WiiU powerful, considering the weak CPU/memory bandwidth).

4 What do I call a SoC? Well, SoC is short for "System On a Chip". It is wildly used in advertising for everything small enough that constitutes the "core" of a computer. Sometimes it is used to describe a single die that contains a CPU,GPU and ram. Sometimes it is used to describe a single chip carrier that contains a CPU,GPU and ram. Sometimes it is used to advertise an MCM that contains a CPU,GPU and ram. It is a buzzword, nothing more, nothing less.



Heavenly_King said:
ethomaz said:

Heavenly_King said:

Seems right lol, I wonder how the PS4 and 720 will be against cell XD

Vegitto pic

yeah I editted my post before reading yours.  I guess they would be different and yet capable of almost the same things.

PS4//720

Gogeta Vegitto

both rape cell

And for the PC fans reading this  I guess PC would be like this:

Goku SSJ4

Lets not get crazy now. 

should look something like this by end of next gen :

720 =

ps4 =

 

PC = 

 

Wii u = 

 



Atto Suggests...:

Book - Malazan Book of the Fallen series 

Game - Metro Last Light

TV - Deadwood

Music - Forest Swords 

drkohler said:
joeorc said:

. MCM's are SOC's
omg, i know the difference, what do you call a SOC? just because both cores are not direct to each other on say a cpu/gpu set mem package does not mean they are not on the same chip carrier were splitting hairs here in the definition. SOC's are on the same die. which is if you went through the entire break down under the chip spreader it is both chips are on the same die. Now if you want to talk about the connection between both chips that is where were on the same page as far as the speed, but like others have pointed out we have yet to see the lay out of the  connection.s between the chips or its channel of on die connection.

Obviously you don't have the slightest clue of what you are talking about. You bring up buzzwords like "SoC", "Set mem package" (whatever THAT means), "same page" (whatever THAT means), "channel of on die connection" (huh?).

Look, the names have a VERY defined meaning. Here is what the WiiU memory system looks like EXACTLY:

1. Four 256MBit *16bit gDDR3 chips, connected to the large MCM. This gives a 64bit wide data bus (exactly what every single memory controller uses in the industry)

2.  The MCM contains two chip carriers, a large one and a small one. The small one contains the die of the CPU. A chip carrier is a square ceramic/thermoplast thingie with pins or balls on the underside that connect to a pcb and has "stuff" inside do do "stuff" (I have worked with chip carriers that contained almost a dozen analog/digital circuits).

3. We don't know what is exactly hidden inside the large chip carrier. It contains either a single die (with GPU and eDram), or two dies (one GPU, one eDram). Unless someone pries open the large chip carrier (a specialist can probably do that without killing the WiiU), we don't know.  One or two dies, one contains the dram memory controller for the gDDR3 drams (on the picture, you can see the address and data lines going to the large chip carrier). Obviously inside the GPU die, there is a lot of "magic" that handles the further distribution of memory to eDram/CPU/DSP. It is this magic that makes the WiiU powerful, considering the weak CPU/memory bandwidth).

4 What do I call a SoC? Well, SoC is short for "System On a Chip". It is wildly used in advertising for everything small enough that constitutes the "core" of a computer. Sometimes it is used to describe a single die that contains a CPU,GPU and ram. Sometimes it is used to describe a single chip carrier that contains a CPU,GPU and ram. Sometimes it is used to advertise an MCM that contains a CPU,GPU and ram. It is a buzzword, nothing more, nothing less.

you are bing quite defensive for talking about hardware

 

"What do I call a SoC? Well, SoC is short for "System On a Chip". It is wildly used in advertising for everything small enough that constitutes the "core" of a computer. Sometimes it is used to describe a single die that contains a CPU,GPU and ram. Sometimes it is used to describe a single chip carrier that contains a CPU,GPU and ram. Sometimes it is used to advertise an MCM that contains a CPU,GPU and ram. It is a buzzword, nothing more, nothing less."

its a classification of chips system is not just a buzzword its is what it is. 

 

next you insult me with trying to seem like you know what your talking about , but try to tear me down in the process

"Obviously you don't have the slightest clue of what you are talking about. You bring up buzzwords like "SoC", "Set mem package" (whatever THAT means), "same page" (whatever THAT means), "channel of on die connection" (huh?)."

you point out :

"Set mem package" and you say you do not know what that mean's?

http://en.wikipedia.org/wiki/Package_on_package

 

you should know you just described it:

"The MCM contains two chip carriers, a large one and a small one. The small one contains the die of the CPU. A chip carrier is a square ceramic/thermoplast thingie with pins or balls on the underside that connect to a pcb and has "stuff" inside do do "stuff" (I have worked with chip carriers that contained almost a dozen analog/digital circuits).The MCM contains two chip carriers, a large one and a small one. The small one contains the die of the CPU. A chip carrier is a square ceramic/thermoplast thingie with pins or balls on the underside that connect to a pcb and has "stuff" inside do do "stuff" (I have worked with chip carriers that contained almost a dozen analog/digital circuits)."

if you google set mem package  look what shows up on the 2nd meaning

 



I AM BOLO

100% lover "nothing else matter's" after that...

ps:

Proud psOne/2/3/p owner.  I survived Aplcalyps3 and all I got was this lousy Signature.

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Jay520 said:
Don't care about numbers or eDRAM or anything like that. I just want to see more comparisons with games like Batman and Black Ops 2. All the hidden technical jargon is moot imo.

For now we have just bad ports... Batman, BLOPS2, Ninja Gaiden 3 and Mass Effect 3 have worst graphics (and have more issues) than PS360 versions.



Not good. I'm not surprised though. Nintendo has no plans in competing in the power department, the Wii proved they don't need to. The Wii U will be a repeat of the original Wii in terms of 3rd party support. Can't say the same for sales.



I haven't read all of the posts in this thread, but the 3dforums comment links to a
Samsung pdf file:
http://www.samsung.com/us/business/oem-solutions/pdfs/PSG_1H_2012.pdf

This explains the 256Mx16 as the per chip memory organization. In other words 256 megabits (32 megabytes) in 16 blocks. That means 512 megabytes per chip, and there are four chips on the Wii U PCB. 512 times four equals two gigabytes, exactly as advertised by Nintendo

The Samsung pdf does not mention data bus width. However, it seems the GDDR3 specification implies 32-bit bus per chip. This would mean double the bandwidth as stated in the original post.
http://en.wikipedia.org/wiki/GDDR3



you guys can keep fighting it out I'm going to finish lunch and hook up my Wii U and start streaming and all that good stuff, btw, my guess is still dual channel, we'll find out eventually if valid sources ever surface, before then, it's all just educated guesses, which I find are mostly wrong answers for the most part anyways



thewayofthepath said:
I haven't read all of the posts in this thread, but the 3dforums comment links to a
Samsung pdf file:
http://www.samsung.com/us/business/oem-solutions/pdfs/PSG_1H_2012.pdf

This explains the 256Mx16 as the per chip memory organization. In other words 256 megabits (32 megabytes) in 16 blocks. That means 512 megabytes per chip, and there are four chips on the Wii U PCB. 512 times four equals two gigabytes, exactly as advertised by Nintendo

The Samsung pdf does not mention data bus width. However, it seems the GDDR3 specification implies 32-bit bus per chip. This would mean double the bandwidth as stated in the original post.
http://en.wikipedia.org/wiki/GDDR3

This model K4W4G1646B is 16 bits... at least there aren't 32 bits for end user.