ethomaz on 18 November 2012
| thewayofthepath said: I haven't read all of the posts in this thread, but the 3dforums comment links to a Samsung pdf file: http://www.samsung.com/us/business/oem-solutions/pdfs/PSG_1H_2012.pdf This explains the 256Mx16 as the per chip memory organization. In other words 256 megabits (32 megabytes) in 16 blocks. That means 512 megabytes per chip, and there are four chips on the Wii U PCB. 512 times four equals two gigabytes, exactly as advertised by Nintendo The Samsung pdf does not mention data bus width. However, it seems the GDDR3 specification implies 32-bit bus per chip. This would mean double the bandwidth as stated in the original post. http://en.wikipedia.org/wiki/GDDR3 |
This model K4W4G1646B is 16 bits... at least there aren't 32 bits for end user.
