Actually maturing already existing process node does not include using different materials. That needs to be planned from the beginning! By transistor design I am referring to the differing implementations of MOFSET technology such as FinFETs. 

Did you take a look at the video ? That Ex-Intel engineer, Bob Colwell isn't lying when he says this. If we were to isolate the variables, better architectures would only account for a performance gain of 50x over the 40 years compared to chip scaling. 

Those charts say 40 nm for each at least for the ones I'm comparing. However, it may not be the best comparison either way since it looks like they were getting 5 gigaflops/watt on 55 nm or more.

I don't have an hour to watch it right now but I think you'd need a better source than one guy talking in a video. You mean to say a manufacturer can't change their materials ever?

Do NOT compare OEM parts ... 

Take the 210 and the 610 then. Both 40 nm and both non-OEM.

Cut the Tegra k1's power consumption in half and you're at 5.5 W with 180 gigaflops. That to me shows you could easily get a 200 gigaflop gpu at around 3-4 watts at 20 nm.

They can change materials once transitioning to a new process node but "maturing" an existing process node is different. What better sources are there than an Ex-Intel engineer giving his thoughts ? He's also a director of a Division for DARPA so do not dismiss his words easily. Maybe I am a little biased here but that's because I totally understand his sentiments since I'm following the same footsteps as he is seeing as how I'll likely end up having similar education and careers as he did. 

Problem is the 610 has a bigger die size so it's understandable why it would win ...

It's still not a good measure to use low end GPUs to see improvements in architectures seeing as how a GTX 295 will end up being better than the GT 610 despite the fact that it's featured on an older 55nm process node.

Right and I think what seems to happen is that they move on rather quickly, at least in the past, between node processes. It seems possible that with the bigger focus on pure power efficiency we could see bigger gains as well. Since it looks like even at 55 nm they could get higher efficiency than when they initially moved to 40 nm.

Edit: lol silly typos, I'm tired.

http://www.neogaf.com/forum/showpost.php?p=121101094&postcount=403

Here's an interesting post from NeoGAF, somewhat similar to Soundwave's proposals.

On the handheld side, I think his pessimistic view should be his optimistic view and his optimistic view is highly unrealistic even for 20nm. He mistook AMD Mullin's 2.8W SDP as TDP which is 4.5W (4W for the dual core). But, im pretty sure Mullins APUs are low power binned Beema(10-15W) chips, and I'm not sure if binned products are good baselines to use.