160 shader units seems a little more reasonable since we now know it's on a larger process than the 40nm TSMC parts we were using to compare. I'm sure some can still argue otherwise, but I've personally seen enough to convince me that those numbers are accurate.

The people that are asserting that WII U is a 160 stream processor part aren't entirely wrong as the power consumption supports that notion. 

Being 45 nm also supports the 160 notion.

It makes no difference if it was 45nm or 40nm since both of them are similar in size. The main hint to the WII U's stream processor count is mostly attributed to it's 30 watt TDP. 

Your relentless rebukes just show that you're the one insecure in this thread ... Unlike you I wasn't here bringing up the PS360 acting all defensive in trying to reassure an assertion. Nobody has to own a WII U to judge it's power, all that's needed is clear cut analysis. 

The wiiu uses a 45 process node confirmed by chip works http://chipworksrealchips.blogspot.com/2014/02/intels-e-dram-shows-up-in-wild.html?m=1   they compare wiiu edram vs 360 edram and give out die sizes.

160 shader units seems a little more reasonable since we now know it's on a larger process than the 40nm TSMC parts we were using to compare. I'm sure some can still argue otherwise, but I've personally seen enough to convince me that those numbers are accurate.

bonzobanana was the first to mention the PS3 and X360.  Zekkyou made the PS3 and X360 a subject.  You jumped in and asked me to define power.  You are all over the place and didn't follow the thread.

The problem is however is that over-time a fabrication process matures, it becomes cheaper to produce.
Another side effect is they have a better understanding of a nodes particular electrical properties. (I.E. Leakage and such.)
Which can assist in lowering power consumption and thus TDP.

Converesly something built at 40nm can actually be a larger chip than something built at 45nm even with the same transister counts as different fabs have different transister densities and as a process matures they can more densley pack transisters. (However, nothing on the same level as what an entirely smaller process can provide.)

Thus a 45nm processor built today could have far more transisters than one built a few years ago at 45nm and still use less power and taking up the same amount of space.

This makes comparing different generations of processors even built on the same process a very difficult affair in the best of circumstances.

It could be anywhere between 160 - 320 shaders.
There are 8 logic blocks or SPU's with the WiiU's latte, now if we look at AMD's other VLIW based architectures...
For VLIW5 there are usually 20-40 ALU's per block. (This is taking into account all of AMD's VLIW GPU designs.)
If it was based upon VLIW4 (Unlikely!) then there is the potential for 32 ALU's.
Thus 8*20 = 160.
And 8*40 = 320.
And 8*32 = 256.


There is still far to much "unknown" when it comes to the WiiU's hardware to give any kind of definitive answer.

The problem is however is that over-time a fabrication process matures, it becomes cheaper to produce.
Another side effect is they have a better understanding of a nodes particular electrical properties. (I.E. Leakage and such.)
Which can assist in lowering power consumption and thus TDP.

Converesly something built at 40nm can actually be a larger chip than something built at 45nm even with the same transister counts as different fabs have different transister densities and as a process matures they can more densley pack transisters. (However, nothing on the same level as what an entirely smaller process can provide.)

Thus a 45nm processor built today could have far more transisters than one built a few years ago at 45nm and still use less power and taking up the same amount of space.

This makes comparing different generations of processors even built on the same process a very difficult affair in the best of circumstances.

Chip area scaling always remains constant for the said manufacturing technology. It is the chip designers themselves that make the choice on how densely packed they want their chips to be.