haxxiy said: We know the amount of cores, we know the amount of cache memory and we know the architecture being used,so... Apparently Power 7 uses 8 instructions per cycle, per core, based off 12 execution units and using 4 threads per core. Assuming 3 GHz, the Wii-U theoretically could pack 24 GFLOPS per core and 72 GFLOPS total, just about the same the X360 manages with the Xenon - setting it's extra vector units aside - but with twice the amount of possible physical threads and twice the cache. So... maybe is a bit slower but more versatile? It could surely use the extra punch in the GPU to cover it's deficiency on number crunching compared to the Xenon at least. Also, someone posting earlier in the thread got it wrong. The Xenon and the CBE weren't "low CPUs with high clocks"; their design was pretty much top of the line when they released, but their clocks were relatively low compared to what the Power architecture usually achieves. The same, to an extent, goes for the Wii-U. |
They are not going to be using a stock Power 7 chip in the Wii U. 4 SMT threads is not very useful in games so they will likely cut that down to 2 as the additional latency added by the longer pipelines is not worth the gains in threading for games.
As for execution units some of them are designed for financial and Scientific applications and will likely be cut from the Wii U as they have no real application in games, Nintendo are big about optomising everything down to just what they need these days.
I mean IBM call it a all-new architecture (bassed on Power 7)
"The all-new, Power-based microprocessor will pack some of IBM's most advanced technology into an energy-saving silicon package that will power Nintendo's brand new entertainment experience for consumers worldwide."
So you really can't use the Power 7 specs for comparison, for a start the most recent detailed leak says that the CPU has 3MB of L2 (total for 3 cores) vs 256KB per core standard for Power 7 chips and no L3 cache where as Power 7 uses huge L3 caches up to 32MB.