Your a little off on what the SPE's can do. It is a misconception that the PPE has to schedule tasks for the SPE instructions can be sent to the SPE's as a whole without talking to the PPE.
The SPEs do not need individual instructions sent to them, if that's what you're trying to say; they are given tasks which consist of a set of instructions. Typically they will be sent a small bit of code, perhaps a loop, that can be separated out and done quickly by the SPU. The code has to be fast enough to not bog the CPU's primary core (the PPU) down. If the CPU needs the result to continue, and can finish the instructions in less time on the primary core than it takes to push the code to the SPU and obtain the result, it's a net loss in throughput. The SPUs are basically small CPUs, with their own RAM, and the primary core is indeed where they receive their instructions. That's the only place where it can happen, as that's where the context exists. The compilers which are being thrown around (the Octopiler in particular) attempt to automate the process of separating the code out, although how successful they will be remains to be seen.
The success of the Cell largely rides on the compiler, otherwise programming for the chip will require a lot of work to get good performance. IBM's going to ensure that it works well, although initial iterations may not be perfect. Again, I highly recommend going over this link, as it goes over the process quite well.
The Gamecube and PS2 had, as their primary CPU, a general purpose chip. The PowerPC and MIPS series processors are both general purpose, although they had additional chips to offload some of the work - such as the GPU. The PS2's graphics engine was a bit more complicated to program for, whereas the ATI in the Gamecube for example should be relatively familiar to most graphics programmers. Ditto for the Xbox. That's likely where the complaints you heard came from, although even this can to a certain extent be abstracted away without too much of a performance hit.