RazorDragon said:
brendude13 said:
| RazorDragon said:
15.3M polygons/sec is for the 2006 version at 200MHz. Here are the specs for the 2008 ver.(65nm), which clocks in about 40M Tri/sec at 400MHz: http://people.csail.mit.edu/kapu/EG_08/Mobile3D_EG08.pdf
Also, no doubt it's running lower than 400MHz. The maximum allowed core frequency is almost never used in portable devices because of heat and battery issues. About the CPU, nobody knows. I find it quite hard to be two ARM11's at 266(and with one being used to wireless functions, so pretty much only 1 core for graphics), since the graphics shown on the 3DS absolutely wouldn't be possible with such an old chip clocked that low. ARM11's can go up to 1GHz, I don't even believe it's possible to underclock one as low as 266MHz.
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http://www.dmprof.com/english/e_products/e_pica_200/
Tadaa. Surprised I didn't think of that before, checking DMP's website. If 3DSbrew is right about the 3DS's GPU clock core, then it will be achieving around 20M polygons/sec, about the same as the Gamecube I believe.
Still not sure about the CPU. Early reports before the 3DS was released said it was either two ARM11's or a dual core ARM11 at 266Mhz, I've seen other "sources" that say it's higher than that though.
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DMP's site may not be up to date at all since these specs are the same from 2006, when the GPU was made, and it seems that the GPU was upgraded based on the 2008 presentation.
About 3DSbrew, I find it hard to believe these specs are true since this site came out of nowhere with info that also came out of nowhere. Also, thanks to hinch's post, it seems that the lowest possible clock for an ARM11 is 350MHz. Makes no sense to me go beyond that and underclock the CPU lower than the lowest possible.
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And yet everyone in the world keeps quoting that BS site LOL.
well this seems to be the best current info maybe. I'm starting to think that it is underclock at 400 MHz a core with its 4-core CPU (ARM11). And this CPU having more problems then previous ARMs seems to have been discover in Firmware 5.0.0-11 update and fixed within a week with Firmware 5.1.0-11
Heres the info:
ARM11
Differences from ARM9
In terms of instruction set, the ARM11 builds on the preceding ARM9 generation. It incorporates all ARM926EJ-S features and adds the ARMv6 instructions for media support (SIMD) and accelerating IRQ response.
Microarchitecture improvements in ARM11 cores[2] include:
- SIMD instructions which can double MPEG-4 and audio digital signal processing algorithm speed
- Cache is physically addressed, solving many cache aliasing problems and reducing context switch overhead
- Unaligned and mixed-endian data access is supported
- Reduced heat production and lower overheating risk
- Redesigned pipeline, supporting faster clock speeds (target up to 1 GHz)
- Longer: 8 (vs 5) stages
- Out-of-order completion for some operations (e.g. stores)
- Dynamic branch prediction/folding (like XScale)
- Cache misses don't block execution of non-dependent instructions
- Load/store parallelism
- ALU parallelism
- 64-bit data paths
JTAG debug support (for halting, stepping, breakpoints, and watchpoints) was simplified. The EmbeddedICE module was replaced with an interface which became part of the ARMv7 architecture. The hardware tracing modules (ETM and ETB) are compatible, but updated, versions of those used in the ARM9. In particular, trace semantics were updated to address parallel instruction execution and data transfers.
ARM makes an effort to promote good Verilog coding styles and techniques. This ensures semantically rigorous designs, preserving identical semantics throughout the chip design flow, which included extensive use of formal verification techniques. Without such attention, integrating an ARM11 with third party designs could risk exposing hard-to-find latent bugs. Due to ARM cores being integrated into many different designs, using a variety of logic synthesis tools and chip manufacturing processes, the impact of its register-transfer level (RTL) quality is magnified many times.[3] The ARM11 generation focused more on synthesis than previous generations, making such concerns be more of an issue.
There are four ARM11 cores:
- ARM1136[4]
- ARM1156, introduced Thumb2 instructions
- ARM1176, introduced security extensions[5]
- ARM11MPcore, introduced multicore support
PICA200
Specification
- 65 nm Single Core [7](max. clock frequency 400 MHz)
- pixel performance: 800 Mpixel/s[7]
- 400 Mpixel/s @100 MHz[2]
- 1600 Mpixel/s @400 MHz
- vertex performance: 15.3 Mpolygon/s[7]
- 40Mtriangle/s @100 MHz[2]
- 160Mtriangle/s @400 MHz
- Power consumption: 0.5-1.0 mW/MHz[2]
- Frame Buffer max. 4095×4095 pixels
- Supported pixel formats: RGBA 4-4-4-4, RGB 5-6-5, RGBA 5-5-5-1, RGBA 8-8-8-8
- Vertex program (ARB_vertex_program)
- Render-to-Texture
- MipMap
- Bilinear texture filtering
- Alpha blending
- Full-scene anti-aliasing (2×2)
- Polygon offset
- 8-bit stencil buffer
- 24-bit depth buffer
- Single/Double/Triple buffer
- DMP's MAESTRO-2G technology
- per pixel lighting
- procedural texture
- refraction mapping
- subdivision primitive
- shadow
- gaseous object rendering