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Branko2166 on 12 October 2008

Thread derailment confirmed...

@OP
PS4 will most likely use the same architecture but will be seriously ramped up. Good thing is that by the time PS4 launches, programmers will be used to it and the games will consequently be incredible.



 

 

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goddog on 12 October 2008
Branko2166 said:
Thread derailment confirmed...

@OP
PS4 will most likely use the same architecture but will be seriously ramped up. Good thing is that by the time PS4 launches, programmers will be used to it and the games will consequently be incredible.

 

how is this thread derailment, we are talking about why the cell in the ps4 might be what it will be? is that not central to the question, or are you happy just making up stuff and random guesses without justification



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Branko2166 on 12 October 2008

@goddog

While some users have been contributing others are happy to take jabs at Sony.
I didn't make anything up as you put it.

fazz said - "I predict that it will be twice as powerful, 10,000 times larger, and so expensive that only the five richest kings of Europe will own it.

Theoretically, it could be used for dating too, but it would eliminate the thrill of romantic conquest."

As for your posts they are commendable. Didn't aim for you with that comment and I apologize if it came off that way :)



 

 

goddog on 12 October 2008
Branko2166 said:

@goddog

While some users have been contributing others are happy to take jabs at Sony.
I didn't make anything up as you put it.

fazz said - "I predict that it will be twice as powerful, 10,000 times larger, and so expensive that only the five richest kings of Europe will own it.

Theoretically, it could be used for dating too, but it would eliminate the thrill of romantic conquest."

As for your posts they are commendable. Didn't aim for you with that comment and I apologize if it came off that way :)

 

sorry about going off on you, i think its the thrid going off comment thread in this one... and in all of these  threads people have been poping in, and stating random crap without any info for the back up....  still thats no reason for me to snap at you i apologies 



come play minecraft @  mcg.hansrotech.com

minecraft name: hansrotec

XBL name: Goddog

Branko2166 on 12 October 2008

@goddog
Glad that we have that sorted out dude :) No hard feelings. BTW I have sent you a pm.
BTW it's definitely going to be very exciting to see how it all turns out.



 

 

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playnext3 on 12 October 2008

i want more graphiks



alephnull on 12 October 2008
goddog said:
bobobologna said:
goddog said:
HappySqurriel said:
goddog said:
HappySqurriel said:

Since the PS3 was launched the Cell has gone from being manufactured using a 90nm process to a 45nm process which means that they could (theoritically speaking) fit 4 cell processors on the same die as they initially produced the cell processor on; by the time the PS4 comes out (in 2011/2012) it is possible that it will be manufactured using a 22nm process which means you would be able to fir 16 cell processors on the same die as they initially produced the PS3's cell processor on.

The processor that is used in the PS4 will probably accept the same instruction set as the Cell processor from the PS3 but I suspect that its architecture will have changed quite a bit in order to make it easier to develop for, and to increase its real world performance.

 

the problem with that is the master cores, would need some sot of manager to performe tasks properly otherwise it would nto be able to function, its far easier to add more spe's. the multi cell chip would have a master core for each of the other main cores, this would limit speed, and create a net loss of processing power, this is true in any multicore set up, but much more true in the cell due to its parent child relation with processing. so no i doubt they would go that way unless its a two per chip set up and one is modified to be dedicated gpu, and the other handles all other tasks. otherwise its a terrible idea

My personal expectations for the cell processor are (probably) quite a bit different from what it will end up being ...

In general, algorithms are either not (easily) parallizable, able to be split into a small number of parallel processes (typically because they require synchronization), or are able to be split into practically limitless parallel processes (because they're implicitly asynchronous). As time goes on and processors become designed with a greater focus on parallel processing there will be a greater focus on asynchronous algorithms and having a large number of cores will be a better approach than having more powerful cores ... currently this is not the case.

With this in mind, I wouldn't be (that) surprised to see all CPUs in the next generation to have a very small number of conventional cores (4 to 8) and a large number of much simpler processors (spes, stream processors) ...

 

this would imply sub dedicated processors which is the best way to go to keep effcientcy up when multiprocessing parrelle will always have snags, one waiting on data from another processors que, which must be transfered thus incressing chance of curuption, and repition to finnish the task or crash

whats funny i think, is this is taking us back to the 80s, when we had coprocessors for all kinds of things.

 

What's the difference with what Intel did? They slapped 2 Core 2 Duos on the same die and called it a day. Well, they called it a quad-core. And it managed to outperform AMD's "real" quadcore architecture. So what would stop Sony from slapping together 2 or more Cell processors together? Assuming that there's enough bandwidth for the processors to communicate with each other without creating bottlenecks, I think it would work fine. Unless there's something I'm missing here.

it has to due with how the cell hands out directions to spes, it complcates the instruction set, and wait times for data, and on a multi cpu system, would cause huge bottleneck in wait time, and drastic incress in complexity, it could be done, but the performance hit would most likly out strip any gain, where as incressing spes, the easiest solution would keep instruction sets simple and require minimal changes.

in short instruction set complexity, and parrelle programing for cell will be drasticaly diffrent then that of mor etradtional cpu tecks like x86, and powerpc. as for amd/duo, with each core increase you lose a % of horse power from raw output and progaming becomes more complex, alot of the quad cores problems come from apps and os not being able to take advantage of it. windows depending on version is core restricted, so that could play into it. pc games for the most part are just now entering in to dual core much les quad

 

Nope, the problem is bus arbitration on cache coherent systems. 4 cores are great in such a system, that is IF they don't try to read and write to memory at the same time. Triple core is pretty much the sweet spot there.
This is the whole point of the CBE. And Larrabee.

 

 



goddog on 12 October 2008
alephnull said:
goddog said:
bobobologna said:
goddog said:
HappySqurriel said:
goddog said:
HappySqurriel said:

Since the PS3 was launched the Cell has gone from being manufactured using a 90nm process to a 45nm process which means that they could (theoritically speaking) fit 4 cell processors on the same die as they initially produced the cell processor on; by the time the PS4 comes out (in 2011/2012) it is possible that it will be manufactured using a 22nm process which means you would be able to fir 16 cell processors on the same die as they initially produced the PS3's cell processor on.

The processor that is used in the PS4 will probably accept the same instruction set as the Cell processor from the PS3 but I suspect that its architecture will have changed quite a bit in order to make it easier to develop for, and to increase its real world performance.

 

the problem with that is the master cores, would need some sot of manager to performe tasks properly otherwise it would nto be able to function, its far easier to add more spe's. the multi cell chip would have a master core for each of the other main cores, this would limit speed, and create a net loss of processing power, this is true in any multicore set up, but much more true in the cell due to its parent child relation with processing. so no i doubt they would go that way unless its a two per chip set up and one is modified to be dedicated gpu, and the other handles all other tasks. otherwise its a terrible idea

My personal expectations for the cell processor are (probably) quite a bit different from what it will end up being ...

In general, algorithms are either not (easily) parallizable, able to be split into a small number of parallel processes (typically because they require synchronization), or are able to be split into practically limitless parallel processes (because they're implicitly asynchronous). As time goes on and processors become designed with a greater focus on parallel processing there will be a greater focus on asynchronous algorithms and having a large number of cores will be a better approach than having more powerful cores ... currently this is not the case.

With this in mind, I wouldn't be (that) surprised to see all CPUs in the next generation to have a very small number of conventional cores (4 to 8) and a large number of much simpler processors (spes, stream processors) ...

 

this would imply sub dedicated processors which is the best way to go to keep effcientcy up when multiprocessing parrelle will always have snags, one waiting on data from another processors que, which must be transfered thus incressing chance of curuption, and repition to finnish the task or crash

whats funny i think, is this is taking us back to the 80s, when we had coprocessors for all kinds of things.

 

What's the difference with what Intel did? They slapped 2 Core 2 Duos on the same die and called it a day. Well, they called it a quad-core. And it managed to outperform AMD's "real" quadcore architecture. So what would stop Sony from slapping together 2 or more Cell processors together? Assuming that there's enough bandwidth for the processors to communicate with each other without creating bottlenecks, I think it would work fine. Unless there's something I'm missing here.

it has to due with how the cell hands out directions to spes, it complcates the instruction set, and wait times for data, and on a multi cpu system, would cause huge bottleneck in wait time, and drastic incress in complexity, it could be done, but the performance hit would most likly out strip any gain, where as incressing spes, the easiest solution would keep instruction sets simple and require minimal changes.

in short instruction set complexity, and parrelle programing for cell will be drasticaly diffrent then that of mor etradtional cpu tecks like x86, and powerpc. as for amd/duo, with each core increase you lose a % of horse power from raw output and progaming becomes more complex, alot of the quad cores problems come from apps and os not being able to take advantage of it. windows depending on version is core restricted, so that could play into it. pc games for the most part are just now entering in to dual core much les quad

 

Nope, the problem is bus arbitration on cache coherent systems. 4 cores are great in such a system, that is IF they don't try to read and write to memory at the same time. Triple core is pretty much the sweet spot there.
This is the whole point of the CBE. And Larrabee.

 

 

 

the bus would become a problem, but how can you rule out loss in gains through a multicore systems movement of information efficiency from core to core? and the sweetspot would depend on not only how you catch, but also how the app was written. if an app is written with quad core in mind, it should be able to out perform a higer clock speed dual core but not nessisseraly significantly



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minecraft name: hansrotec

XBL name: Goddog

alephnull on 12 October 2008

@goddog

Well just in the scenario in which you have two cores fighting over the same bus (but accessing different areas in their shared memory bank) the situation become analogous to ethernet versus a point-to-point ring network. The two symmetric cores will be interfering with each other's transmissions, the ring topology however alows each node to always use maximum bandwidth (assuming each node is equidistant) they can pass their output to the left (and/or right with two ring networks with opposite orientation) with each "cycle". This limits the latency of a request from a memory bank, however if the bus is constantly being utilized by all of the cores then such a topology will give you maximum theoretical throughput.

 

The variables which will determine which layout is optimal will be

1) ratio of time spent waiting on the CPU to time spent waiting on the shared memory in a given program.

2) number of cores

Large dma lists are important also, but more complicated.



goddog on 12 October 2008
alephnull said:

@goddog

Well just in the scenario in which you have two cores fighting over the same bus (but accessing different areas in their shared memory bank) the situation become analogous to ethernet versus a point-to-point ring network. The two symmetric cores will be interfering with each other's transmissions, the ring topology however alows each node to always use maximum bandwidth (assuming each node is equidistant) they can pass their output to the left (and/or right with two ring networks with opposite orientation) with each "cycle". This limits the latency of a request from a memory bank, however if the bus is constantly being utilized by all of the cores then such a topology will give you maximum theoretical throughput.

 

The variables which will determine which layout is optimal will be

1) ratio of time spent waiting on the CPU to time spent waiting on the shared memory in a given program.

2) number of cores

Large dma lists are important also, but more complicated.

true, i remember early 2000s there were lost of problems with the bus, ram, cpu, conection being the slowest part of the computer. right now i think the controler chipsets are holding back, but we could easly stuble back into bus being the main issue 

 



come play minecraft @  mcg.hansrotech.com

minecraft name: hansrotec

XBL name: Goddog