@goddog
Well just in the scenario in which you have two cores fighting over the same bus (but accessing different areas in their shared memory bank) the situation become analogous to ethernet versus a point-to-point ring network. The two symmetric cores will be interfering with each other's transmissions, the ring topology however alows each node to always use maximum bandwidth (assuming each node is equidistant) they can pass their output to the left (and/or right with two ring networks with opposite orientation) with each "cycle". This limits the latency of a request from a memory bank, however if the bus is constantly being utilized by all of the cores then such a topology will give you maximum theoretical throughput.
The variables which will determine which layout is optimal will be
1) ratio of time spent waiting on the CPU to time spent waiting on the shared memory in a given program.
2) number of cores
Large dma lists are important also, but more complicated.
