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Forums - Gaming - Xenon vs Cell Which one really is better ??

NNN2004 on 09 July 2008

i dont want to add fuel on fire but .. before in one site i read that the Cell have one main Core & 7 virtual .. idont know if this is true but maybe someone here know what this is mean.



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Fishie on 09 July 2008
Marty8370 said:
@Fishie - Have you even read this article. Or can't you help been a total plank.

Synergistic Processor Elements (SPEs)

Each Cell contains 8 SPE's(7 SPE'sfor PS3)

An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.



*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz)

32 X 8 SPE's = 256 GFLOPS
32 X 7 SPE's = 224 GFLOPS(PS3 Cell)


Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

http://www.blachford.info/computer/Cell/Cell1_v2.html

 

 

I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:

 Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence

4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

 Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

 ___________________________________________

There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.



Marty8370 on 09 July 2008
NNN2004 said:
i dont want to add fuel on fire but .. before in one site i read that the Cell have one main Core & 7 virtual .. idont know if this is true but maybe someone here know what this is mean.

 

The PS3 Cell has 8 cores(1 PPE & 8 SPE's). 1 SPE has been disabled too improve yeilds when making the Cell chip. So the PS3 has 1 PPE & 7 SPE's that are useable to the PS3 as a whole



NNN2004 on 09 July 2008
Fishie said:
Marty8370 said:
@Fishie - Have you even read this article. Or can't you help been a total plank.

Synergistic Processor Elements (SPEs)

Each Cell contains 8 SPE's(7 SPE'sfor PS3)

An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.



*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz)

32 X 8 SPE's = 256 GFLOPS
32 X 7 SPE's = 224 GFLOPS(PS3 Cell)


Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

http://www.blachford.info/computer/Cell/Cell1_v2.html

 

 

I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:

 Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence

4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

 Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

 ___________________________________________

There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.

one thing i want to know ... does the TFLOPS thing make a huge difference between Cell & Xenon ???

 



Marty8370 on 09 July 2008
Fishie said:
Marty8370 said:
@Fishie - Have you even read this article. Or can't you help been a total plank.

Synergistic Processor Elements (SPEs)

Each Cell contains 8 SPE's(7 SPE'sfor PS3)

An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.



*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz)

32 X 8 SPE's = 256 GFLOPS
32 X 7 SPE's = 224 GFLOPS(PS3 Cell)


Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

http://www.blachford.info/computer/Cell/Cell1_v2.html

 

 

I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:

 Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence

4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

 Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

 ___________________________________________

There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.

 

@Fishie - What part of this don't you understand:

'An SPE is a self contained vector processor which acts as an independent processor'. It clearly states 'INDEPENTENT PROCECESSOR'.



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Marty8370 on 09 July 2008
NNN2004 said:
Fishie said:
Marty8370 said:
@Fishie - Have you even read this article. Or can't you help been a total plank.

Synergistic Processor Elements (SPEs)

Each Cell contains 8 SPE's(7 SPE'sfor PS3)

An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.



*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz)

32 X 8 SPE's = 256 GFLOPS
32 X 7 SPE's = 224 GFLOPS(PS3 Cell)


Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

http://www.blachford.info/computer/Cell/Cell1_v2.html

 

 

I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:

 Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence

4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

 Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

 ___________________________________________

There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.

one thing i want to know ... does the TFLOPS thing make a huge difference between Cell & Xenon ???

 

 

Yes. And most of the PS3 power comes from the SPE's.



NJ5 on 09 July 2008

MikeB seems to be suffering from doublethink. On one hand, he claims the Cell makes it easier to attain peak performance. On the other hand, he claims even a 360 launch game (Kameo) is already close to tapping the Xenos...

It's very hard to take him seriously, especially when you couple this kind of contradiction with his fundamental misconceptions about low-level programming.



My Mario Kart Wii friend code: 2707-1866-0957

Marty8370 on 09 July 2008

@Fishie - Even if you say that the PS3's 7 SPE's are capable of:

3.2GHz x 4 x 2 = 25 GFLOPS. 25 X 7 SPEs = 175 GFLOPS.

Which could be on the low side, PS3 Cell still has miles more raw power than 360's tri-core could ever achieve.



NNN2004 on 09 July 2008
Marty8370 said:
Fishie said:
Marty8370 said:
@Fishie - Have you even read this article. Or can't you help been a total plank.

Synergistic Processor Elements (SPEs)

Each Cell contains 8 SPE's(7 SPE'sfor PS3)

An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.



*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz)

32 X 8 SPE's = 256 GFLOPS
32 X 7 SPE's = 224 GFLOPS(PS3 Cell)


Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

http://www.blachford.info/computer/Cell/Cell1_v2.html

 

 

I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:

 Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence

4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

 Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

 ___________________________________________

There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.

 

@Fishie - What part of this don't you understand:

'An SPE is a self contained vector processor which acts as an independent processor'. It clearly states 'INDEPENTENT PROCECESSOR'.

 

 sorry man i cant take ur posts seriously cuz u seems like a sony fan not programmer so i leave it for one else.



MikeB on 09 July 2008
NJ5 said:
MikeB seems to be suffering from doublethink. On one hand, he claims the Cell makes it easier to attain peak performance. On the other hand, he claims even a 360 launch game (Kameo) is already close to tapping the Xenos...

It's very hard to take him seriously, especially when you couple this kind of contradiction with his fundamental misconceptions about low-level programming.

Look it is simple, trying to fit an as big as possible square through a circle isn't very efficient space wise.

Let me say it in another way. I was talking about actual real world results. The 360 has more in common with traditional architecture and shares tools with the PC allowing developers to get quicker results. However games will never come close to the Xenon's theoretical performance due to the many bottlenecks.

Let's say you never drove a car, you may achieve quicker results on a bike.

As you know the source on Kameo is Microsoft. Write them your complaint letter.



Naughty Dog: "At Naughty Dog, we're pretty sure we should be able to see leaps between games on the PS3 that are even bigger than they were on the PS2."

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