| Marty8370 said: @Fishie - Have you even read this article. Or can't you help been a total plank. Synergistic Processor Elements (SPEs) Each Cell contains 8 SPE's(7 SPE'sfor PS3) An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task. *This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS(PS3 Cell runs at 3.2GHz) 32 X 8 SPE's = 256 GFLOPS 32 X 7 SPE's = 224 GFLOPS(PS3 Cell) Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware. http://www.blachford.info/computer/Cell/Cell1_v2.html |
I am familiar with that article yes and you clearly have a hard time understanding the basics, that and you added the calculation for PS3 yourself since the article states the following:
Synergistic Processor Elements (SPEs) Each Cell contains 8 SPEs. An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.
*This is counting Multiply-Adds which count as 2 instructions, hence
4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS
Like the PPE the SPEs are in-order processors and have no Out-Of-Order capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.
___________________________________________
There is no calculation for the PS3 there and what you did was take the 32gflops number for the 4GHz Cell and applied that to the PS3. The PS3 of course does not run at 4GHz but runs at 3.2GHz so your calculation was flawed from the start.
