| fordy said: Actually, AMD's catch-up with Intel on the FPU front came more with the 3DNow! extensions introduced in the K6-2. This gave them a performance increase by introducing FP SIMD. The problem is, the Athlon never had the advantage that you mentioned. In fact, 19 of the new instructions that AMD added to the 3DNow set for the Athlon were mimics of Intel's SSE instruction set, putting them (according to Andandtech) "on par" with SSE. |
You're right, AMD did implement 3DNow! with the K6-2, but it only provided *any* sort of tangible performance improvement in software that would utilise the instruction set.
The whole point of SIMD execution (MMX, SSE and 3DNow! ) is that if you're performing one operation on multiple data types, you might aswell perform that operation on all data types at the same time, instead of waiting for the next piece of the puzzle.
The FPU in the K6 was still increadibly weak, being the main issue that most had with the chip, heck there was remours at one point of a revamped K6 with an improved FP unit.
The Athlon however was a different ball game as that was where AMD placed a large emphasis on the FPU unit with that particular architecture, they even introduced 3DNow! Successor with that particular architecture (I.E. Enhanced 3DNow!).
Clock for clock, the Athlon was superior to the Pentium 3, right up untill Intel integrated the L2 cache on-die, which consiquently meant that the L2 cache was locked at the CPU's speed rather than 1/2 or 1/4th.
https://en.wikipedia.org/wiki/Pentium_III#Coppermine

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