VGC: Switch 2 Was Shown At Gamescom Running Matrix Awakens UE5 Demo

[zeldaring]

haxxiy said:

Soundwave said:

I won't be posting here much because I find the discourse is just not very good, but I will take some time to respond to this well thought out post. 

The problem that I think arises is there's really no need for 1536 CUDA cores to get that performance. You could get the same performance from 1024 CUDA cores and just clock them higher (which has no effect on the cost) and the chip would be cheaper and have better yields. Having a massive chip like that for no reason just doesn't make sense, your yields will be worse making production more expensive and you're paying for a more complex chip for no reason. 

There is, if you're taking power consumption into account. It scales linearly with frequency but quadratically with voltage, which needs to be higher at higher clocks. A smaller chip at higher clocks would consume more power even if it performs the same.

Also, mind that 5 nm is significantly more expensive than 8 nm. You'll get more dies per wafer in the former, yes, but said wafers are significantly more expensive (I couldn't find the exact figures for Samsung, but TSMC's 10FF process, which is comparable in complexity and size feature to Samsung's 8nm, was ~2.6 times cheaper than N5).

That being said, obviously the bigger node comes with significantly higher power consumption, so lower battery life, more heat, etc. So while I agree it should go for N5, I'm just pointing out that the smaller node would be chosen because of these other considerations, not necessarily SoC cost.

Really? We had our own vgchartz scientist state that it's  cheaper to make 5nm Then 8nm.