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Kynes on 24 September 2012
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Zappykins said:
Kynes said:
Zappykins said:
Ok, can someone answer this?

If it actually has this GPU, and since it has 480 shaders to X360's 48 shaders. Does that imply at the same hertz, that it is 10 times as powerful?

(Would I guess would transfer into 3 times better looking?)


Not really, AMD (ATI) changed the way they counted the shaders, before they were 5-way VLIW shaders, so those 48 X360 shaders are the equivalent to 240 shaders. The E6760 has newer technology (newer compression techniques, compatibility with newer effects, much easier to program for...) and more and faster RAM, so it should be at least 2-3 times more powerful in the graphics department, clock per clock. We don't know the final frequencies, and it's not sure that Nintendo uses this chip, but if they do use it, it's a very good chip for the power envelope that WiiU has.

I thought they were 4 way shaders, not 5 way?  Thus only 192?  Although, that could explain another spec number that was coming out to 240.

Thanks for explaining how they count shaders differently.  It is a little sneaky of AMD, but I understand why they did it.  And it is actually more clear.  I knew it couldn't be right (as much as it would have been cool) if the WiiU GPU was ten times more powerful than the X360.

http://en.wikipedia.org/wiki/Xenos_%28graphics_chip%29

"On the chip, the shader units are organized in three SIMD groups with 16 processors per group, for a total of 48 processors. Each of these processors is composed of a 5-wide vector unit (total 5 FP32 ALUs) that can serially execute up to two instructions per cycle (a multiply and an addition). Thus each of the 48 processors can perform 10 floating-point ops per cycle. All processor in a SIMD group execute the same instruction, so in total up to three instruction threads can be simultaneously under execution."

ATI used 5 way-VLIW units. They used XYZWT (X Y Z W being operations on the 4 color values, so they need simpler units, T being transcendental instructions as sin(x) or arctan(x), "harder" to execute so they use beefier units) up to the 6xxx series and the newer APUs, where they changed to 4 way (XYZW simpler units, using all four to calculate the transcendental operations) and then to "scalar" units on GCN (7xxx series)

ATI said they used to have approximatelly a 3.8 ocupation on the 5-way units, so most of the time one of the units was idle, that's why they changed to the 4-way units. Then they changed to the scalar units due to the GPGPU programming easiness that this type of architecture provides.