Kynes said:
One critical aspect that must not be overlooked is the foundry process compatibility in the context of NVIDIA’s Ampere architecture. The consumer-grade Ampere GPUs were specifically designed for Samsung's 8nm process node (technically a refinement of their 10nm node, known as 8LPP), whereas the data center and professional variants (e.g., GA100) utilized TSMC’s 7nm process. Importantly, TSMC’s N7 and N5 nodes do not share standard cell libraries, IP blocks, or physical design constraints. Standard cell libraries encompass transistor-level building blocks and include design rules, timing characteristics, and layout constraints optimized for a given process. These are proprietary to each foundry and typically not portable between fabs (e.g., Samsung and TSMC), and often not even between nodes within the same foundry due to substantial differences in fin pitch, metal stack height, and EUV usage. As a result, porting an Ampere-based SoC from Samsung 8nm to TSMC 5nm would not be a matter of simple tapeout retargeting or minor RTL tweaks—it would necessitate a full front-end and back-end redesign, including physical synthesis, place-and-route, timing closure, power delivery, and validation, using entirely new EDA flows, libraries, and verification suites. Furthermore, NVIDIA has not previously released any Ampere-family silicon on TSMC's N5 node, meaning there is no existing design collateral or hardened IP (e.g., PHYs, memory controllers, I/O subsystems) for that process. This implies that a 5nm Ampere SoC would be a from-scratch development effort, requiring a much larger engineering investment compared to adapting an existing chip like Orin (based on Ampere architecture and already validated on a mature process node). In addition to the NRE (non-recurring engineering) costs, Nintendo would also face higher per-unit costs due to the wafer pricing at TSMC N5, which is significantly more expensive than Samsung’s 8nm. Altogether, these factors make a custom 5nm Ampere design both technically complex and economically unjustifiable for a console-grade SoC. |
Right, the point I was making was that if Nintendo planned for a 2025 release from the start, they probably wouldn't have gone with an Ampere chipset at all so there wouldn't be any "porting", the T239-alternative or whatever it would be called in that alternative universe would be planned for Lovelace from the start.
I wasn't talking about a T239 on 5N, I was talking about an entirely different designed chipset.
Plus obviously Nvidia and Nintendo are going to figure this out for the inevitable mid-gen refresh.
