Pemalite said:
padib said:
The part I was challenging is that you said any memory chip can be interchanged on a piece of hardware, but you can't really on a closed device. Meaning that the card's bandwidth itself is set upon manufacturing.
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But you can as I have provided evidence of it.
padib said:
Meaning that the card's bandwidth itself is set upon manufacturing.
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Ram is designed to operate at JEDEC specifications.
https://en.wikipedia.org/wiki/JEDEC_memory_standards
Which means a Ram chip that is "advertised" as DDR4 3200mhz with 24-24-24-15 timings will operate just fine at that specification.
But that same memory chip needs to also operate at JEDEC's other specifications like DDR4 1600mhz with 10-10-10-12.5 timings.
In short, the memory chip itself is an "Up to" standard and will operate fine at all lower JEDEC specifications as they are designed for it.
https://en.wikipedia.org/wiki/DDR4_SDRAM#JEDEC_standard_DDR4_module
Which means that the Nintendo Switch is able to have multiple memory speeds and timings straight out of the gate.
I.E. LPDDR4 1600mhz and 1331Mhz as per the digital foundry evidence I provided earlier.
https://www.eurogamer.net/digitalfoundry-2016-nintendo-switch-spec-analysis
padib said:
For example, the switch is manufactured as LPDDR4 1632MHz, so it is designed to have a bandwidth of 1632 x 2 (dual) x 8bytes (bus width) / 1024 (Mega to Giga) = 25.5 GB/s. Don't you agree on this?
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You need to start paying attention.
I have ALREADY PROVIDED EVIDENCE that literally says that is not the case.
The Switch's Ram will operate at 1331Mhz ----or---- 1600Mhz.
Which means the Ram on the Switch will provide 21.2GB/s -----OR----- 25.6GB/s.
I don't see why you are struggling to understand this. I have literally provided the evidence and you are still trying to argue with it, without providing evidence.
padib said:
Edit: Another point I want to mention is that the memory bus width is fixed in the motherboard and can't be changed after manufacturing. For example, on the Nintendo switch, it is 64bits. Some part of the badwidth calculation are fixed.
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Memory bus is the amount of "physical lanes" that connect DRAM to the memory controller.
However, some of those lanes can be switched off or on, depending on a variety of factors.
For example, many laptops and PC's will operate with a 64-bit wide memory bus, but will start to operate with a 128-bit memory bus when you install a second memory stick, 192-bit with 3 sticks, 256-bit with 4 sticks if you have a system with a triple or quad memory bus support and so on.
Sometimes you will have RAM with a bifuricated memory bus to different processors/memory controllers, so one chip will have a 32-bit memory bus, the other chip with a 64-bit memory bus, the Ram speed doesn't physically change, but the bandwidth does depending on what is trying to access it.
Playstation 3 is an example of this issue.
And then of course you have things like a clam-shell memory layout, so the first chunk of Ram can provide full bandwidth, the second chunk at a lower amount of bandwidth. - The Xbox Series S and X are an example of this.
And of course you have power gating which will turn parts of the memory bus depending on power/load/profiling.
This is a complex topic, you are trying to paint it as a black and white issue, when it simply isn't and never will be.
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I'm not trying to paint it as anything, relax!
I didn't revise that a chip manufactured to a specification could run at other combinations of latency and clock speed within the same JEDEC spec, that was interesting to read.
You need to realise that the conversion could have been much smoother. You know, almost everyone here appreciates your knowledge on hardware, you really can rest on that and not panic when we talk. I have no agenda and still I don't see how my learning process advantages any view. Take it easy, fellow.
Anyway what I can't figure out is, if bandwidth is in GB/s and capacity at a unit of GB, for example, what is the unit of the combination and what is the metric called, is it throughput? For example, the Switch has an 4GB LPDDR4 at 1600MHz, bandwidth not considering capacity I get 25.6GB/s (docked). In the Oled I have a 6GB RAM chip with the same bandwidth of 25.6GB/s (docked). Intuitively I know that the 6GB capacity Ram on the Oleg yields a possible 1.5 greater data transfer than the OG (though I read it's locked at 4GB), yet they have the same bandwidth of 25.6GB/s. Isn't there a metric that aggregates the capacity and the bandwidth?
Reply calmly please.
Edit: I think I figured it out. Basically the capacity represents how the RAM serves as a bank of information, that I can access more quickly than say a hard drive. Then, it becomes a question of how much time it takes to fill that bank. So if I want to fill my 6GB at a bandwidth of 25.6GB/s, then it would take 6GB / 25.6 GB/s = 0.0026 seconds to rewrite the whole chip or to read the whole chip. But since I have more data on faster media, the data's travel time is ultimately faster because I can access more data at this fast rate. Especially important if I'm working with repeated assets or textures that can linger in the faster memory before being swapped out with new or other information on the hard disk.
Last edited by padib - on 29 May 2024
