When will an improved switch-hardware be released ?

[Pemalite]

Bofferbrauer2 said:

In 7nm, that chip shouldn't be any bigger than the X1 in the Switch, which is produced in 28nm, which means production costs would be about the same.

A chip built at 7nm and a chip built at 14/16nm that is the exact same physical size? It will be cheaper to manufacture on 14/16nm.
Wafer costs go up every time you shrink.

Bofferbrauer2 said:

Keep in mind I said 2021, by then the 7nm process should have matured enough, though there's still the possibility of a 10/12nm process (16/14nm would just be too outdated by then even by Nintendo standards imo).

I think you might have fallen for the advertising ploy that is "nm" naming these days.
Whilst 12nm does have inherent advantages over 14nm at say... Global Foundries... 12nm is just a refined 14nm process, which in turn is a refined 20nm process.

At-least Samsung and TSMC changed their BEOL.
You are looking at probbal 10-15% gains going from 14nm to 12nm at most... And I think I am being generous there.

Bofferbrauer2 said:

RAM prices are falling again, and by 2021, DDR5 should be arriving.

DDR5 doesn't equate to LPDDR5.
Ram prices may also increase by 2021... You only need a couple of factories to be taken offline from a weather event.

Bofferbrauer2 said:

 So I doubt 8GiB DDR4 by then would be more expensive than 4GiB when the Switch launched. While I didn't precise it here (I did so before in another thread), that upgraded Switch+ would be released at the same 299$ pricetag as the original Switch in my book.

I was more or less pointing at the memory speed on a 128bit bus in conjunction with a doubling of DRAM.

You can have the Ram run at the same clockrate/Mhz as the current Switch and you would still more than double your bandwidth, so it doesn't make sense to drive up the memory controller which consumes power when you have already made massive bandwidth gains.
Or, Nintendo might opt for higher clocked memory but a smaller bus which brings with it a ton of cost-benefits like a simper memory controller, less PCB traces and thus layers, simpler power delivery... You know. The usual.