| haxxiy said: There will be possibly three shrinks - but two of them are half-shrinks, so the math still ends up being right, apparently. We know from a TSMC panel on a ITRS meeting, if I'm not mistaken, and their aim for pitch sizes, that both their 7 nm and 5 nm are going to be half shrinks, though 10 nm was a full shrink indeed from 20 / 16 nm. That's assuming, of course, Nintendo will release a new console with a brand-new node, and even then, that it will use all the battery juice for raw power instead of extending its life from the Switch's mere three hours. Even if it waited until 2027 it's not a guarantee the next TSMC node, indeed a full shrink - 3.5 nm, the last one planned before die stacking - would be widely available, given how long the wait for some recent nodes. So some people are indeed overestimating the power of the theoretical Switch's sucessor given its undocked mode often loses even to the X360 (the main exception being possibly when the X360 was RAM starved) and that's a 12 year old hardware, from a time die shrinks were much easier as well. |
I don't think TSMC's 10nm was their full shrink, it largely shared it's BEOL technology with 20/16nm and it showed since it still didn't compare too favorably to Intel's 14nm process ...
TSMC claims that it's their 7nm that will be a full node shrink and I also think their plan is for 5nm to be a full node shrink too if their making a transition to EUV ... (they can afford 5nm to be a full node shrink if they use a next generation lithography technology as their new basis)
