Looking At Tegra Xavier -- The Next-Gen Switch Chip

[HoloDust]

haxxiy said:

HoloDust said:
I honestly have no idea how you got to 6.6TFLOPS with 512 cores...if you're talking FP32. That must be either some epic cores or epic clock at which they're running.

DLTOPS is the PMPO of the computer industry. It can be calculated on a variety of ways and there is no doubt in my mind that Nvidia is talking up their own future product by making it seem like the equivalent of 6.6 TFLOPS for deep learning. It's only a logical conclusion if Volta is better than Pascal or Maxwell at that, specially given their dismal FP64 performance other than the Titan chips.

Isn't DLTOPS calculated for 8-bit integer, for Deep Learning aplications?

6.6TFLOPS (FP32) sounds insane for 512 core part...it would either mean core clocks of 6500MHz, if we're still going with classic 2 ops per cycle, or those cores can do at least 4 ops per cycle...and then they still need to run at 3000+ MHz.