| darklich13 said: How is taking code disigned to run on 3 cores down to 1 a cheap process? Seams more like they would port to 1 core and 2 SPE's. Which in this case the 360 would have an advantage. This is because 3 actual cores are better than 3 SPE. But when developers take advantage of the Cell additional SPE, this is where you will see the advantage for the PS3. |
I'm glad you asked. =)
The 3 cores of the X360 basically end up having one core run the primary game loop, and the other 2 cores doing OS work (unavoidable), as well as audio, disc streaming, and expensive math tasks like animation and culling. The game loop is often, by far, the most expensive of these tasks.
Many developers don't effectively use all three cores of the 360 -- in fact, since the OS eats up some time on one of the cores, they don't really even have the option to. Most of the work resides on a single core, but things like audio, streaming, etc. are pretty easily offloaded onto another core, with commonplace programming techniques. Those tasks don't require a lot of horsepower, but.. anything freed from the main core is good.
In porting such a game to the PS3, you can choose to jam all that work (OS, audio, streaming, animation, game loop) onto one core, if you choose. Software threads are abstracted away to the point where programmers don't usually have to deal with them directly on the hardware. Its easy to port the game from one console to another in this manner. However, with the extra workload, the one core, now forced to do all the work, takes longer to run a single frame.
Many middleware libraries now make use of the SPEs for developers, where they didn't used to. You can run audio on the SPEs, you can run physics on them, animations, you name it. So, once again, its easy for developers to offload work onto processors that aren't running the main game loop -- the middleware does it for them.
A large portion of the OS work, and I think audio, have always been easy to run on the PS3 SPEs, as I recall, so, in a sense, the single PS3 PPU core never really had to do the work of "3 cores"... more like 1 core, plus some extra tasks that didn't usually tax a 2nd core on the 360 to begin with.
I'll explain why shared cache resources and shared bus for multicore processors are slower than the Cell broadband design as well, if you like. =) In short, the SPEs NEVER suffer from a cache miss (because they only address local memory that is, basically, the speed of a L2 cache), and never contend with other cores for cache space or rarely bus time. If you know anything about modern processors, you'll understand the power of that, and how much more powerful it makes a single SPE, relative to a single Xenon core, for many kinds of tasks.









