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| sc94597 said: I mean this is pretty outdated at this point, but as of 2022 the cost difference between Sammy 8N and TSMC's 4N was 2.2 times per wafer. That was before Apple moved on to 3N (M2 Max was just about to release) and when Nvidia released Lovelace and AMD released RDNA 3. https://www.semianalysis.com/p/ada-lovelace-gpus-shows-how-desperate "SemiAnalysis sources indicate that the wafer cost of TSMC N5/N4 is more than 2.2x that of Samsung 8nm. With that wafer cost increase comes 2.7x higher transistor density. Nvidia’s top-end die went from 45 million transistors per millimeter squared (MTr/mm2) to 125 MTr/mm2. A fantastic density increase that is closer to 2 process node shrinks than 1 process node shrink. Jensen Huang is right that cost per transistor improvements have slowed significantly." Going with a newer than 8N process node also allows Nintendo to save on battery and cooling costs. Somebody just posted this chart on Famiboards which shows that Nintendo usually keeps in line what is current when it comes to process nodes. |
Good catch---though it seems like TSMC has been hiking prices 5-10% every year since, so the cost gap could still be around 3x come next year if Samsung hasn't changed theirs.
That being said, even the largest Orin would be under 140 mm² on N5/N4, and the T239 should be even smaller, which doesn't seem like a good fit for the PCB.
I'd still guess it's something in between, probably even N6 itself like the other consoles. All the datacenter Amperes were done in TSMC's N7, so there's some precedent for that design from Nvidia too.
