zeldaring said:
sc94597 said:
There is a wide gap between "not being an idiot" and knowing every facet about the hardware one is ostensibly leaking. As he will admit, he gets things wrong about a third of the time (i.e RTX 3090Super, RTX 2080ti Super, etc.)
Notice that he doesn't respond to the many people querying about the apparent contradiction between "Switch = T239" and "8N".
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it looks like a cut down version of t239 so if that happens i win the bet, we don't need to wait for ports lol.
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@Bolded Do you mean the T234?
And no, we'll still stick to the original terms of the bet (which actually favor you if it is a Lovelace chip, you're set free.)
zeldaring said:
haxxiy said:
There is, if you're taking power consumption into account. It scales linearly with frequency but quadratically with voltage, which needs to be higher at higher clocks. A smaller chip at higher clocks would consume more power even if it performs the same.
Also, mind that 5 nm is significantly more expensive than 8 nm. You'll get more dies per wafer in the former, yes, but said wafers are significantly more expensive (I couldn't find the exact figures for Samsung, but TSMC's 10FF process, which is comparable in complexity and size feature to Samsung's 8nm, was ~2.6 times cheaper than N5).
That being said, obviously the bigger node comes with significantly higher power consumption, so lower battery life, more heat, etc. So while I agree it should go for N5, I'm just pointing out that the smaller node would be chosen because of these other considerations, not necessarily SoC cost.
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Really? We had our own vgchartz scientist state that it's cheaper to make 5nm Then 8nm.
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https://www.semianalysis.com/p/ada-lovelace-gpus-shows-how-desperate
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SemiAnalysis sources indicate that the wafer cost of TSMC N5/N4 is more than 2.2x that of Samsung 8nm. With that wafer cost increase comes 2.7x higher transistor density. Nvidia’s top-end die went from 45 million transistors per millimeter squared (MTr/mm2) to 125 MTr/mm2. A fantastic density increase that is closer to 2 process node shrinks than 1 process node shrink.
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That was a year ago, when one would expect 5nm to be nearer to its peak cost (due to the current move to 3nm and the fact that the RTX 4000 series was imminently releasing then.)
Last edited by sc94597 - on 21 September 2023
