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[JEMC]

haxxiy said:

JEMC said:

My comment was in regards to your density and performance increase guesses, not the waffer costs. After all, the article claims that Nvidia will restructure the SM, which should influence both those parameters.

Given what's stated in the article, Mr. leather jacket already went to TMSC to secure 3nm wafers so, unless Nvidia has decided to split their chips between both TSMC and Samsung (for example going with the former for the bigger and more expensive parts, leaving the rest for Samsung), we have conflicting rumors. Which one to believe?

That's all from TSMC. The performance increase at isometric power means the expected clock speed increases, so it's just basically what Ada at 3 nm would be.

I'm not arguing or questioning your numbers, I'm only saying that they don't tell the whole story or take everything into account because you're looking at it purely from the point of the manufacturing process while ignoring any architectural improvements that Nvidia can/will introduce with Blackwell.

What if the increased focus on ray/path tracing leads to bigger SMs? That would affect density. What if the architecture is designed to run at faster clocks? That will impact performance. What if Nvidia doesn't want to go insane with power consumption and Broadwell is more energy efficient? That will also play a part in the end result, and neither of those three architectural decisions have anything to do with the jump to a new node. They will "only" leverage them to bring the end product to a whole new level.