Cost reduction is definitely still doable this gen. Assuming the APUs are 300 mm2 on 7nm and 100 mm2 on 3 nm, that's the difference between 160 vs. 550 dies per wafer. More than enough to compensate for the shrink even with the cost per wafer doubling (to the tune of ~ $25 saved per APU).
Of course, there will be redesign costs involved, but there will be savings in power consumption and supply, form factor and shipping, etc. in the long run.