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[haxxiy]

Captain_Yuri said:

Yeah, RDNA 3 can't dual issue FMAs in Wave32, so a lot of applications predictably won't see major increases vs RDNA 2 on a per WGP and per clock basis

— Wild_C (@_wildc) December 7, 2022

Yes, VOPD is required for 2x issue in Wave32 in RDNA 3, and there's no VOPD instruction that does 4-input FMA

You have to resort to 3-input FMACs to get the full benefit of RDNA 3's SIMD designhttps://t.co/76PqHJ9E0k

— Wild_C (@_wildc) December 7, 2022

We will see what happens but I get the feeling RDNA 3 needed more time in the oven

I mean, it was expected for anyone with a hint of skepticism when AMD when they gave out wild TFLOPS numbers.

Even if the FP pipelines themselves are separated and dedicated units, you weren't going to see four Wave instructions being executed at the same time in each SP, unless this thing was pulling 500 - 600 W.

Mind, it is a similar thing for Nvidia, which after Turing has a pipeline that can do Int or FP32 but not both at the same time, so a third of the cores in Ampere or Ada is always idling at any given time, no matter how good your scheduler/pipeline reprogramming is.

(At least AMD is still just calling it another FP32 unit inside the CU, which is correct. Nvidia on the other hand claimed they "doubled" their cores outright when they didn't do such a thing).