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[JEMC]

Pemalite said:

JEMC said:

Ok, let me start with this: RDNA 3 rumors? Already? C'mon, give me a break!

Ok, with that out of the way, let me say that I don't belive it. At least not unless AMD is stupid, insane or the MCM design doesn't really work well. After all, the whole concept is to break down the monolythic chips into smaller parts that make it not only more scalable, but also cheaper to produce because you can get more of them from each waffer, right?

Well, if that's the case, why, oh, why, would they go with a chiplet the size of the full Navi 21 chip? Where's the benefit of that? How can you scale it down from there to the x600 and x500 series?

As I said, it doesn't make sense to me. Therefore, and until someone proves me wrong, I'll think that this is false.

It would be built at 5nm TSMC, it should be half the size, if everything else is kept equal of course.

A large part of the chip is cache and logic which could continue to be built at 7nm and likely live as it's own wittle chippy.

Jumping on a new node won't make it better because the yields will be low and the chiplets will still be relatively big.

If they went with 40CU instead of 80, the situation would be better. Not only the smaller size would make for better yields, but it would give AMD a better starting point allowing them to make cards with 40, 80, 120 and even the 160CUs of the rumor, enough to make a whole range of cards.