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A bit of info about AMD's Zen3 CPUs (most of it was already known/leaked):

AMD Zen 3 Powered Next-Gen Ryzen 4000 ‘Vermeer’ CPUs Detailed: Up To 16 Cores / 32 Threads, 32 MB Shared L3 Cache Per CCD, 8 Cores Per CCX
https://wccftech.com/amd-zen-3-ryzen-4000-vermeer-cpus-detailed-up-to-16-cores-32-threads/
Official information regarding AMD's next-generation Ryzen 4000 CPU family based on the Zen 3 core architecture has been unveiled. The information is part of confidential AMD documents that were shared with us by CyberCatPunk.

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According to the document, the AMD Zen 3 based Ryzen 4000 AM4 CPU family, codenamed Vermeer, is designed for use in high-performance desktop platforms & will feature up to two CCD's (Core/Cache Complex Dies) and a single IOD (I/O Die).

Unlike the previous generation design where each CCD comprised of two CCX's (Core Complexes), the Zen 3 CCD will consist of a single CCX which will feature 8 cores that can run in either a single-thread mode (1T) or a two-thread mode (2T) for up to 16 threads per CCX. Since the chip houses a maximum of two CCDs, the core and thread count will max out at 16 cores and 32 threads which is the same as the existing flagship AM4 desktop CPU, the Ryzen 9 3950X.

Each Zen 3 core will feature 512 KB of L2 cache for a total of 4 MB of L2 cache per CCD. That should equal 8 MB of L2 cache on a dual CCD CPU. Along with the L2 cache, each CCD will also comprise of up to 32 MB of shared L3 cache. For Zen 2, the L3 cache was split between the two CCX's with each CCX having their own separate (Up To) 16 MB cache. The size of the cache remains the same per CCD but now all cores can share a larger number of L3 cache.