SuperFin transistors — The +'s now have fancy names
One of the main enhancements that Intel stressed upon during the Architecture Day press brief was the new SuperFin transistor. While previous 14 nm FinFET processes allowed for a maximum of 5.9% intra-node performance delta, Intel said that the transition to 10 nm SuperFin allowed for greater than 15% intra-node delta from the base node, which is comparable to a full node transition. SuperFin uses a new capacitor design called SuperMIM (metal-insulator-metal), which delivers 5x the increase in MIM capacitance.
SuperFin will offer an improved gate process (for higher channel mobility), additional gate pitch (to drive higher current), and an enhanced epitaxial source/drain (to lower resistance and increase strain). Intel finally did acknowledge that the current naming convention in process improvements does have potential for confusion. Consumers may not know how a 14 nm++ node differs from the base 14 nm or 14 nm+ one. Going forward, Intel will be using defined nomenclature for intra-nodal improvements. For instance, the upcoming refinement to the 10nm SuperFin node will be called 10nm Enhanced SuperFin. Intel is currently optimizing this node for data center use.
https://www.notebookcheck.net/Intel-details-the-Willow-Cove-architecure-in-Tiger-Lake-SuperFin-transistors-and-better-VF-curves-along-with-an-official-introduction-to-Alder-Lake.486079.0.html
PC Specs: CPU: 7800X3D || GPU: Strix 4090 || RAM: 32GB DDR5 6000 || Main SSD: WD 2TB SN850
