JRPGfan said: watching video... intrest. |
Uh.. sorry to rain into your parade, but this one has me worried the most. AMD/MS/DF say 380 GIntersections/s. How did they get to this number?
Solution: 52 CUs * 4 TMUs * 1.825 GHz = 380 GIntersections/s
This tells us that AMD's RDNA2 accelerates RT using the TMUs (or the TMUs simply limit RT). This is by far inferior to NVidias solution. and it is not an extra TFlops, it would actually mean taking away from the 12TFlops...