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It's very unlikely there'll be more than 40 - 44 CUs on next generation consoles even if the die size is around 400 mm2 and they take I/O out of it.
60 - 80 mm2 will be the Zen CPU which we know the size already. The ray-tracing cores occupy around 180 mm2 in the high-end Turing GPUs. Shrink it to 7 nm and you're talking about 100 - 110 mm2 at the very least. That leaves 210 - 240 mm2 for the GPU - smaller than the 250 mm2 Radeon 5700 chips and their 40 CUs.
Of course, you might opt to severely gimp the ray-tracing cores or take L3 cache out of the Zen CPU, but all of that will come with severe performance costs (such as effectively disabling any meaningful ray-tracing or reducing CPU IPC by 20-30%). Is the trade-off worth it? They've probably studied it far better than we can surmise. But even then, the die space saved wouldn't be enough for the 11 - 14 TFLOPS some people thoughtlessly dream of.
These Radeon cards spit blood above 1600 - 1700 MHz, and we've discussed elsewhere how power consumption influences everything in design, including up to consumer-class product rules and licencing, which are a very significant dealbreaker. Not to mention the costs...
(edit - corrected number of CUs)
Last edited by haxxiy - on 29 October 2019
