megafenix said: well, i would like to think the way you do, but 2ghz for the edram is unlikely, nec reported 40nm edra at a maxiu of 800mhz in 2007 http://www.techpowerup.com/44979/nec-introduces-40nm-embedded-dram.html " Tuesday, November 20th 2007
NEC Introduces 40nm Embedded DRAMJimmy 2004
NEC Electronics Corporation today introduced two new technologies for the manufacture of 40-nanometer (nm) system-on-chip (SoC) devices with embedded dynamic random access memory (eDRAM). The UX8GD eDRAM technology boasts clock speeds up to 800 megahertz and low operating power, making it optimal for use in consumer electronics products such as digital video cameras and game consoles. The UX8LD eDRAM technology features low leakage-current levels that reduce power consumption by as much two-thirds compared to equivalent SRAM, making it ideal for use in mobile handsets and other portable devices that require low standby power.
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besides, i am not sure if the edram can have more clock speed than the gpu clock speed. i mean, just look at gamecube, the main 1tsram had about 324mhz of speed, yet the mebedded 1tsram in teh gpu had to downclock the sp'eed to the flipper 162mhz,so its pretty unlikely what you say , unless you have a good example to tell otherwise
here, this should be interesting, going back to the past http://www.segatech.com/gamecube/overview/
Specifications First released by Nintendo at Nintendo's Spaceworld on August 24th, 2000 in Tokyo, Japan. New specs announced by Nintendo on it's website on May 15th, 2001, during the 2001 E3 show in LA. "Gekko" CPU upgraded from 400 MHz to 485 MHz, and "Flipper" GPU downgraded from 202.5 MHz to 162 MHz. Texture Cache Here is any interesting article from AsiaBizTech that provides some information on the number of simultaneous accesses that can occur with the texture cache: Parallel Processing of 32 Access Transactions **Note: Data bus transfer is now 2.6 GB/sec due to revised specs, and the external 64-bit data-bus runs at 324 MHz now.
More info on the internal bandwidth of the caches from here: Both internal memory buffers have a sustained latency of under 5 nanoseconds. The frame and z-buffer memory is capable of 7.68 Gbytes/second of bandwidth. The texture buffer boasts an even faster bandwidth of 10.4 Gbytes/s because it's divided into 32 independent macros, each 16 bits wide for a total I/O of 512 bits. This gives each macro its own address bus, so that all 32 macros can be accessed simultaneously, said Mark-Eric Jones, vice president of marketing for Mosys. " |
Gee you really don't know anything about tech, eh ?
http://www.anandtech.com/show/6993/intel-iris-pro-5200-graphics-review-core-i74950hq-tested/3
Why does intel iris pro graphics have an eDRAM clock of 1.6 ghz ?!
Something tells me you got yourself in this trap.