| petalpusher said: There s no latency advantage with DDR3, it's a myth. In fact GDDR5 has better latency |
This is of course false. "Latency" is a buzz word many use without knowing what it really means or where it comes from. It has even been abused by some here to explain why the XBox One can switch from watching tv to gaming to skyping to you-name-it in an instant. This has absolutely nothing to do with memory latency whatsoever (in essence, having everything in one hdmi in/out channel removes the copy protection handshaking required when switching different hdmi inputs). It is simply a task switching feature of the OS (obviously MS programmers knew what they needed to do).
Memory latency between ddr3 and gddr5 memory comes from two contributions:
1. Latency from telling the memory what to do
2. Latency from actually doing what you want (basically read or write a buffer line)
Point 2 is easily explained: there is no difference between ddr3 and gddr5 memory because both are accessing the same dram cell contruction, so this latency is identical.
Point 1 is more favourable to ddr3 memory. Telling a gddr5 chip what to do is an extremely complicated matter that introduces more clock cycles than commanding a "simple" ddr3 chip. Hence the latency from this point 1 is always higher with gddr5 than with ddr3 (But nowherer near the 8-10 times purported in articles). However, it is important to note that just how much more time is needed depends on how the memory controller works, and if various power savings features are enabled in the gddr5 chips. GPUs in PCs always use memory control settings that go for maximum bandwidth at the cost of worst latency (because latency in a pure gpu-system is almost irrelevant).
At this point, we have no idea how memory controllers are designed/setup in the PS4, or if power savings features are enabled or not in the gddr5 chips. What we know from M. Cerny is that the major latency obstacle in PCs (getting something from cpu/gpu to gpu/cpu over the pcie bus) has been completely eliminated in the PS4 design with a direct command bus. We also now there are cache controllers in the dual Jaguar setup that can handle the gddr5 interface, so we can assume the engineers that designed the controllers know what they had to do. I'm pretty sure the engineers around M. Cerny had a satisfactory answer to most of the problems.
This leaves us to the question of "Is the higher gddr5 latency a problem at all?" This can be answered only by the people who write the software. Take an extremely lousy coder and you will choke the bandwidth with stalls, taking you straight to latency hell. Take a good programmer who knows how to organize data and code, and stalls with noticable latency will be almost inexistent in code fetches and negligent in data fetches.
