Soleron said:
The SPE can independently execute integer code. Therefore it is a core. |
Interesting analogy, but by that definition, even the little 10NES lockout chips in the NES cartridges can be considered cores. How about RSA one-time key generators? What about pipelines that include two integer processing elements? Should they each be considered cores, even though they're slaves to the pipelined stage?
There was a time when the definition of 'core' was not hijacked and used for purposes of making a manufacturer's CPU look better (like Intel's ridiculous NetBurst microarchitecture, used purely to soup up GHz and nothing more, as well as AMDs marketing ploy of basing their processor ratings "In comparison to Pentium 4" with the n+ range).
The way that the Cell is seen is essentially a slight step up from Intel's Hyperthreading, in which main occuring execution resources are duplicated and left to the internal task scheduler to assign them (respectively the SPEs and PPEs of the core). The more unused resources are left to the singular resource (if you notice, the PPE is the only element that handles the entire PowerPC instruction set).
So tell me, why can each SPE be classed as a core under this analogy, yet Intel's Hyperthreading cannot?
