Squilliam on 13 June 2009
Actually its funny I just put together something like this as a test spec for the system. It would have 3x the memory bandwidth, no tiling for 1080P with 4aAA FP16 available for developers to use, compute shader for developers if they want more floating point performance for animation etc a large SSD cache which can be doubled as storage as well and the CPU in question would walk rings around the current Cell processor and they could do it all with a combined die with roughly 200mm^2 area with 1.6B transistors on the 32nm process.
Tease.
