Kynes on 24 May 2009
| Soleron said: "Mike, you can say what you want, but an in order, RISC CPU is not what Joe Sixpack needs in his PC." Um, we're all running RISC CPUs. x86 is translated to an internal instruction set which is RISC in nature. |
It's true. Maybe I should have bolded the important thing in my assertion, which is "an in order". SPU's have other barriers with everyday code, as having direct access to only 256 KB of memory space, it's L2, and having to do DMA memory access to RAM. This introduces a really big latency, which harms performance. Cell is great for set top boxes, HD video codecs, supercomputers, and things like that, but not so great for databases, word proccessors and spreadsheets.
Sometimes I have lost in translation problems.
