@Squilliam I assume you are referring to VMX's altivec-lite ISA versus the SPU SIMD ISA. I have no experience with VMX, but I do have a decent amount of experience with altivec.
It is true that the SPU ISA does not support branching operations on SIMD registers, thus requiring and data to be transfered to a normal register before evaluating a conditional. But this isn't really that big of a deal. Just because an ISA makes an operation available, doesn't mean you should use it. A VMX programmer would suffer would at best suffer only slightly less from a bad prediction and possibly worse if the jump distance was short enough to be in LS of one of the SPEs. Remeber, CISC instructions are really running a large number of microcode instructions which are going to be fairly similar to the RISC instructions presented to the SPU programmer.
