My XBox 360 vs PS3 comparison (mostly technical)

[MikeB]

@ fazz

That's theoretical, the actual bandwidth that can be achieved AT MAX is 204GB/s.

From the (in parts outdated) article:

"Since each snooped address request can potentially transfer up to 128B, the theoretical peak data bandwidth on the EIB at 3.2GHz is 128Bx1.6GHz = 204.8GB/s. "

Still the 300+ GB/s EIB bandwith I stated is correct. Compare bandwidth to a highway where wider highways would mean more bandwith. The data being transferred being cars. If this was a one way highway 204.8GB/s bandwidth would be 100% efficiency, however the Cell is a complex chip with multiple highways also connected to other chips like the RSX (which can use the XDR memory through the Cell). In the case of car traffic, you could pretty much be certain the highways have enough lanes to prevent traffic bottlenecks.

So at least this points to the Cell not being bottlenecked in terms of available internal bandwidth (looking solely at the Cell's elements by themselves), that's the point I was trying to make with regard to the section of my post you are replying to.

You are using the Cell's strictly theoretical figures under perfect conditon performance figures versus supposed real world Xenon numbers. How is that fair? The Cell can do around 200GFLOPS using ALL 8 SPU's+PPE+Matrix Multiplication at max.

With the 200+ GFlops testing by IBM they only measured the power of 8 SPEs, they didn't measure PPE/VMX performance. Achieving roughly 98% efficiency.

The 76.8 GFlops for the Xenon is its peak performance. I know of no tests which proved any real world data.

Obviously ignoring the 256GB/s of the eDRAm to the GPU

It's 32 GB/s, take a look at the diagram in the original post.

the bandwidth to the RAM is 22.4GB/s

The bandwidth is shared with the CPU, like already pointed out in the original post. The PS3 has dedicated buses.

As to access the other 256MB of XDR the GPU must go through a 20GB/s read and 15GB/s write bandwidth to the Cell to have access to it (latency).

For most stuff, the memory directly connected to the RSX will be used, but there is enough bandwidth to use the XDR memory as well. I've heard of developers using the XDR as additional texture memory as it not only increases texture memory it also increases texture bandwidth. The latency will increase but RSX this isn't a big problem for GPUs and RSX has bigger than usual caches anyway.

I've also heard of developers writing compressed textures directly from the SPEs to the RSX, this bypasses memory altogether so so effectively reduces latency while increasing bandwidth.