| crumas2 said:
SPEs/SPUs are not general purpose CPU cores. They're specialized execution units that are very good for manipulating large amounts of similar data in useful and interesting ways. Think bit-blitter or DSP on steroids. They're very good at pre-processing video information before sending it to a GPU. This is one of the reasons they're difficult to program, because it's not like programing a traditional CPU core. They're better suited than a CPU for same tasks, and worse suited for others. And I wouldn't invest too much energy in IBM's promotional "tech" literature... they will always try to paint their architecture in the best light by pointing out where a specific theoretical spec is better than the competition's. The reality of what the system can be used for is almost always more complicated. This all said, yes the PS3's architecture (not just the Cell) is very powerful in many ways, but it still doesn't have 8 cores. |
You should really avoid commenting on this, since you have, quite obviously from this comment, never worked on a PS3, or at least never with the SPUs. I can say with authority that the italicized parts of the comment above is pure BS, and the sources you got it from don't know what the hell they are talking about. The SPUs *are* general purpose cores, with a lot of extra logic devoted to vector mathematics. They lack the supporting memory architecture to do things in the same manner as the PPU, but that doesn't stop them from being able to do it. Being an independant core doesn't require that you be able to address main memory directly -- the only requirement is that the processor be able to run concurrently with other cores. The SPUs can, and frankly they can run general purpose code, that doesn't involve accessing large tracts of memory (which is a big deal), just as fast, or in some cases faster, than the 2 hardware PPU threads can.
The bolded part of your comment is absolutely correct, however. At least you got that right -- or your source did. The only reason any newbie engineer wannabe could possibly claim that the SPUs are "not independant cores" is due to the fact that they can only address their 256K local memory (not a "cache" as some have called it), and must stream data from main memory in/out. The truth is, however, they can do this independantly of the PPU. Thus *drum roll* they are independant cores. They are NOT coprocessors, as you seem to be implying, as that's the word used to describe a "dependant processor" which isn't actually capable of independant operation. The SPUs are -- thus, they are independant cores.
I know you aren't going to be able to say to someone who doubts this fact "Groucho said that's not true", but I can tell you that, if you understand that the SPUs are independant cores, you will be correct, and anyone who says otherwise is... well, ignorant, and full of... balogny. Please have faith that some authorities do surf here, and please stop peddling this kind of hogwash.
