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Haha, I'm a nerd too because I chose Moore's law for my topic

So here's a summary of my report

Moore noticed in 1963 that the amount of transistors that could be cost effectively fitted onto a single chip had doubled every 3 years. Transistors perform Boolean logic operations. But simply having twice as many transistors does not necessarily imply twice the performance.

Moore suggested that this might continue to happen, and he was right. Although growth actually accelerated, now it's closer to number of transistors doubling every 18 months. Moore's law also works for things like the number of megapixels per dollar of digital cameras, flash memory follows moore's law but is currently doubling every 12 months.

Now I'll explain a bit how this doubling can be brought about.

In the early 2000's, we made the leap to the 90 nm node, which essentially means that the size of the smallest components in a computer chip is about 90nm, where 1 000 000 000 nm is 1 metre. Computer chips are made using Electromagnetic Radiation (ie light, UV, Infared) and in this case they used UV rays, with a lower wavelength than had been used previously. This allows them to produce finer patterns, and is analogous to using a thinner blade to cut something. For various reasons, this was really expensive to do.

So the next time there was a reduction, to the 65 nm node currently in use in the PS360, the wavelength was kept same, and a trick was used to allow smaller technology. It is called Optical Proximity Correction - OPC (check wikipedia for more details) If you try to make components much smaller than the wavelength, there will be errors. OPC is a mathematical way to work out what these errors will be, and compensating for them.

Several companies have started using 45 nm technology, using the same wavelength as the 90 nm process. Again, a special technique is being used. A Phase Shift mask (check wikipedia again) is a sheet of glass that slows down a light wave by exactly half a period. You can then use a combination of the original light and the slowed light to create components half the size that they otherwise could be.

Intel has detailed several of their plans for future chip designs Double Etching (see wiki) involves splitting the manufacturing process into two steps. Say you had a holepunch that puts two holes 10cm apart. If you want 4 holes each 5 cm apart, you use it once, move it 5 cm over and then use it again. Double etching just does this on a much greater scale. If we can develop accurate enough machines, triple, quadruple etching are possible. Double etching will be used to take us to the 32 nm process.

At this point, we need to look into some new materials. Because as dimensions get smaller, electrcity starts conducting across barriers that it isn't meant to be able to. Immersion Lithography (wiki) can also be useful, although suffers many of the drawbacks of reducing the wavelength such as cost.

The 22 nm node can be reached using these technologies discussed

The 16 nm node is apparently reachable, although would require triple or quadruple etching

Intel says that it sees a clear way towards the 11 nm node, but that's all the detail I have

As far as I can see, Moore's law will be relevant for a long time