nightsurge said:
The Cell processor from STI, an alliance of Sony Computer Entertainment, Toshiba Corporation, and IBM, is a hardware architecture that can function like a stream processor with appropriate software support. It consists of a controlling processor, the PPE (Power Processing Element, an IBM PowerPC) and a set of SIMD coprocessors, called SPEs (Synergistic Processing Elements), each with independent program counters and instruction memory, in effect a MIMD machine. In the native programming model all DMA and program scheduling is left up to the programmer. The hardware provides a fast ring bus among the processors for local communication. Because the local memory for instructions and data is limited the only programs that can exploit this architecture effectively either require a tiny memory footprint or adhere to a stream programming model. With a suitable algorithm the performance of the Cell can rival that of pure stream processors, however this nearly always requires a complete redesign of algorithms and software. He is right. It is NOT a stream processor. It can only act like one with very complicated and reworked software support. True stream processors combined in mass in the structure of say a GPU will always be superior to the Cell unless the Cell structure were to add more PPE and LOTS more SPEs. And I have no idea where you even got this "if it's not x86 its crap for games" statement. When was this even something people believed? 5 years ago? x64 is clearly the best choice for pretty much anything within the last few years and from this point on. Or perhaps this statement is so foreign and aged that I do not know what exactly it is referring to? |
now that's your opinion and while i respect that DR. Hofstee and I disagree with your take:
This paper describes the architecture and implementation of the original gaming-oriented synergistic processor element (SPE) in both 90-nm and 65-nm silicon-on-insulator (SOI) technology and introduces a new SPE implementation targeted for the high-performance computing community. The Cell Broadband Engine™ processor contains eight SPEs. The dual-issue, four-way single-instruction multiple-data processor is designed to achieve high performance per area and power and is optimized to process streaming data, simulate physical phenomena, and render objects digitally. Most aspects of data movement and instruction flow are controlled by software to improve the performance of the memory system and the core performance density. The SPE was designed as an 11-FO4 (fan-out-of-4-inverter-delay) processor using 20.9 million transistors within 14.8 mm2 using the IBM 90-nm SOI low-k process. CMOS (complementary metal-oxide semiconductor) static gates implement the majority of the logic. Dynamic circuits are used in critical areas and occupy 19% of the non-static random access memory (SRAM) area. Instruction set architecture, microarchitecture, and physical implementation are tightly coupled to achieve a compact and power-efficient design. Correct operation has been observed at up to 5.6 GHz and 7.3 GHz, respectively, in 90-nm and 65-nm SOI technology.
http://portal.acm.org/citation.cfm?id=1345059.1345063&coll=GUIDE&dl=GUIDE&CFID=63865659&CFTOKEN=31018906
I AM BOLO
100% lover "nothing else matter's" after that...
ps:
Proud psOne/2/3/p owner. I survived Aplcalyps3 and all I got was this lousy Signature.