mutantsushi said:
I think a better analogy is the walls getting too thin to stop leaks. But irregardless, fixating on "shrink" ignores that other process improvements besides that are possible. 3D transistors and stacking is already a factor, that can certainly be extended, possibly to extreme lengths. That is all only considering utilizing current silicon process, when alternatives already exist, never mind new approaches including optics. Now those may not be conducive to career prospects for silicon engineers, but processing improvements don't have clear-cut end of road in sight.
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True. But realistically there is only one way for any of this to be possible.
Take for instance a game console has a budget of $500. That $500 must cover everything that goes into that box...... including the controller. Now say $150 is spent on the APU and another $150 on RAM. The only way to get performance gains is if for that same amount of money you can get more hardware.
Ideally, node shrinks mean two things. You can either get the same performance but from using less silicon to build the chips thanks to your node shrink and spend less money (slim consoles) or you use the same amount of silicon as before but have more transistors due to the node shrink and as a result better performance (Pro/X) all the while spending the same amount you originally started with.
There may be slight benefits here and there like maybe a doubling or ram module capacity so you only need half the mount of modules as you originally did but thas pretty much it.
The key thing here though is that how the APU is built remains the same. Those alternatives you are talking about while being able to make a more powerful APU will also mean a more complicated APU design wise which will result in costs being higher than the original launch costs to begin with. Thats a no no.
The pro and X exist because spending $120 in 2016 got them an APU that was way more powerful than the one that $120 got them in 2013. Still about the same sized APU. About the same cost. Just were ale to fit more transistors in the same space while using the same manufacturing process.
Last edited by Intrinsic - on 26 November 2018